A semiconductor device having a three-dimensional structure has been proposed in which a memory hole is made in a stacked body in which multiple electrode layers are stacked, and a charge storage film and a semiconductor film are provided to extend in a stacking direction of the stacked body inside the memory hole. In the semiconductor device of the three-dimensional structure, a stacked body alternately stacked with insulators and the electrode layers is provided on a semiconductor substrate. The electrode layer is used to form a select gate line or a word line. The stacked body includes a stacked portion and a staircase portion. The stacked portion is provided in a memory cell array. The staircase portion is provided in the staircase structure portion outside of the memory cell array. A contact of an interconnect correspond to the select gate line or the word line is provided in the staircase portion. In the original manufacturing process, the stacked body is formed on the substrate as a structure alternately stacked with the insulators and sacrifice layers. The sacrifice layers are used to form the electrode layers by replacing to a conductor. In the replacing process, a portion where the sacrifice layer is removed is used to form a space. In the memory cell array, the space is supported by a memory hole. In the staircase portion, it is supported by a support pillar. In the memory cell array, a mechanical strength of the stacked body is high. This is because the memory holes disposed are dense. In contrast, in the staircase portion, number of the support pillars is small compared with the memory holes. Thus, a mechanical strength in the staircase is low compared with a mechanical strength in the memory cell array. For example, in the case the mechanical strength is low, the insulator is warped. The warping of the insulator causes, for example, failure such as disconnection of the electrode layers. It is desirable to enhance the mechanical strength of the staircase portion of the stacked body. Furthermore, in the electrode layers, by reducing RC time constant, for example, it is desirable to improve “electric characteristic” represented by “signal response characteristic (charging and discharging characteristic)”.